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- URL: https://x.com/stikves/status/2058434571608490047
- Author: sukru tikves (@stikves)
- Posted: 2026-05-24 06:27:00
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1/ @stikves
@AgileJebrim
They need to know how GPU shaders are organized to even answer this.
But I hope nobody came with “I would write a simple for loop…”
2/ @AgileJebrim
@stikves
Actually the correct answer does involve one or more for loops in the answer.
3/ @stikves
@AgileJebrim
(Going down the rabbit hole)
Yes, it would of course.
Some context goes out in short replies here.
4/ @AgileJebrim
@stikves
You can comment longer. :P
5/ @stikves
@AgileJebrim
I could…
Yet, at doing those at midnight usually backfires.
“What was a thread block again? Or was it a…”
6/ @AgileJebrim
@stikves
Here’s your hardware target. You have an arbitrary number of these SMs and a L2 cache and global memory available for cross communication between them. Describe how you would do it in relation to the hardware described here.
7/ @stikves
@AgileJebrim
Since they work independently, you start from the nearest (register file) and move up (shared mem) to intra SM (L2)
Though to be fair, for standard operations I would look this up
Why?
There is usually one corner case the prior art discovered but not obvious at first sight
8/ @stikves
@AgileJebrim
(The standard solution to binary search for example had a off by one bug in the books for over a decade.
Can I write binary search from the tip of my head?
Of course, did 100s of times
Will I actually do it for production?
No)