Source
- URL: https://x.com/NOTimothyLottes/status/1917659515773690071
- Author: NOTimothyLottes (@NOTimothyLottes)
- Posted: 2025-04-30 19:17:11
@NOTimothyLottes @onatt0 i had the same idea (except for compression) but got frustrated at how tedious it is to specify memory layouts in C. in assembly, it would be much easier: just a bunch of
dd/dq.
Thread
1/ @NOTimothyLottes
@emhyr7_ @onatt0
Things could get really interesting if a company like AMD supported transparent data compression on a last level cache which is shared CPU/GPU. Something like that could likely get argument compression, saving bandwidth.
2/ @NOTimothyLottes
@emhyr7_ @onatt0
Also another interesting note, is that a argument scatter model acts like a cache warming for future argument reads because CPU side it’s read-modify-write when scatter storing into cachelines.