Source
- URL: https://x.com/NOTimothyLottes/status/2033376425760215474
- Author: NOTimothyLottes (@NOTimothyLottes)
- Posted: 2026-03-16 02:54:52
Thread
1/ @NOTimothyLottes
How about removing {call,return,branch,conditional-branch}. Replacing with keeping code in lower 32-bit, then,
(1.) REG=Fetch 32-bit and advance
..do work..
(2.) Branch to REG
Loops=repeat address
Big loops=hierarchical
Conditional=change addresses
Self-modifying data (vs code)
Branches: 2026-03-16-mbur82-on-x86-the-mov-instruction-is-turing-complete
2/ @NOTimothyLottes
Effectively you layout a linear array of the address of subroutines to call. And each subroutine advances the read pointer. Can adapt at runtime to do new stuff by writing addresses of what to do, and modify addresses for conditional execution. Easy to make portable.
3/ @NOTimothyLottes
*Forth (and others) way of de-conditionalizing loops is to say do a computed branch to skip into a stream of calls. But that is horrible for the CPUs that exist. Moving from streams of physical call opcodes, to addresses actually fixes that problem quite nicely.
4/ @NOTimothyLottes
The other thing here is this, if you are doing something that is effectively a portable assembly level thing, one of the huge differences across ISAs is {calls,conditional branch relative immediate offset sizes, etc}, so this thread’s construct removes all that crap.