Source

Branch

1/ @Venemo

@SebAaltonen

AFAIK that is only fully true on AMD GPUs, everyone else has to go through some pain to implement this extension.

2/ @SebAaltonen

@Venemo

Nvidia has also similar scalar instructions and can store descriptors in scalar registers. Their CUDA docs list the new instructions that were added in Turing. Latest 3 generations of Nvidia should be fine.