Source
- URL: https://x.com/JoaoBapt/status/2001189382359781675
- Author: João Baptista 🇧🇷 (@JoaoBapt)
- Posted: 2025-12-17 07:15:03
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1/ @JoaoBapt
@SebAaltonen
“As the heap management in Metal is automatic, users can’t allocate texture descriptors in contiguous ranges.”
Check out texture view pools, they allow for some manual manipulation of the texture heap: https://developer.apple.com/documentation/metal/mtltextureviewpool?language=objc
2/ @SebAaltonen
@JoaoBapt
I’ll check. Seems to be a brand new iOS26/MacOS26 feature.
The main idea of DX12 SM6.6 heap is that it’s global. User never needs to bind it. All shaders see all textures all the time and shaders can calculate indices in the way that’s most optimal.
3/ @SebAaltonen
@JoaoBapt
The new iOS26/MacOS26 TextureViewPool seems promising indeed. Can you create a single big pool for all your textures, similar to a SM6.6 descriptor heap? Is it performance optimal way to access all textures?
4/ @SebAaltonen
If I understood it correctly, your driver internally allocates N contiguous descriptors for each TextureViewPool in your driver’s internal descriptor heap. I can ask the gpuResourceID of the first texture in the pool to know the pool’s base offset in the driver managed descriptor heap?
MSL now allows adding integer offset to texture2d
Basically implementing DX12 SM6.6 style heap would be possible if I allocate a one massive Metal 4 TextureViewPool and ask the gpuResourceID of the first slot. I route this baseTextureID to the shader using some side channel and add it to the texture heap index. This should work?
5/ @SebAaltonen
@JoaoBapt
Can’t find any information of adding a integer index on a base texture2d
6/ @SebAaltonen
@JoaoBapt
As expected, that’s not supported. Oh well. Almost there. CPU can do heap indexing in Metal 4.0 with this, but GPU can’t. Hopefully support added soon!
7/ @TellowKrinkle
@SebAaltonen @JoaoBapt
Depends on how much you like abusing UB
This generates the expected ISA when compiled, and given that the in-memory layout is set in stone (from the CPU side), it doesn’t seem too likely to break…